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The AC58 series comprises a range of absolute rotary encoders with optical scanning for many different application areas. The 58 mm encoders are available in solid shaft and hollow shaft versions and meet the requirements of almost all industrial applications and demanding applications involving motor feedback. In single and multiturn versions, these encoders achieve a resolution of up to 34 bits (22 bits single turn, 12 bits multiturn, depending on the interface). In addition to connections via SSI/BiSS, numerous other interfaces such as EtherCAT, Profinet, Profibus, CANopen, CANlayer2, DeviceNet, Interbus and SUCOnet are available. Click on one of the connection options for the associated data sheet
Unit of Measure

Technical Specs

Brands

N/A
Hengstler

Model

N/A AC 58 - I-SSI

Type

N/A Incremental Encoder

Certification

N/A

Mechanical

Housing Diameter

N/A 58 mm

Shaft Diameter (Solid Shaft)

N/A 10 mm

Shaft Diameter (Hub Shaft)

N/A 10 mm12 mm

Protection Class Shaft Input (EN 60529)

N/A Ingress Protection (IP64) Ingress Protection (IP67)

Protection Class Housing (EN 60529)

N/A Ingress Protection (IP64) Ingress Protection (IP67)

Maximum Speed (Continuous)

N/A 10,000 rpm

Maximum Speed (Short Term)

N/A 12,000 rpm

Axial Shaft Load

N/A 40 N

Radial Shaft Load

N/A 60 N

Typical Starting Torque

N/A 0.01 N·m

Features

N/A

  • Positioning and Speed feedback in one Encoder
  • MT Absolute encoder + Incremental output TTL or HTL
  • Broad temperature range: -40 to + 100ºC
  • Control input: Preset and Direction
  • Resolution: Up to 29 Bit; PPR: 512, 1024, 2048
  • Compact design: 50 mm length
  • High EMC - Resistance
  • Appropriate for standard frequency converter and asynchron motors

Additional Information

N/A Synchronous readout of the encoder data is according to the clock rate given by the SSI-counterpart.

The number of clock rates is determined by the type of encoder (single-turn resp. multi-turn) and the configuration of the special Bits as defined.

For multiple transactions (the stored value is readout several times successively) a fixed clock rate per transaction must be kept Ifor single-turn 13 resp. 14 clocks, for multi-turn 25 resp. 26 clocks).

  • In the rest position, when the last clock brush has passed by more than 30µs, the data output is logically at "1".
  • With the first descending clock edge the encoder data and the special bits are loaded in the shift register of the encoder interface.
  • With each ascending clock edge the data bits are serially readout beginning with the MSB.
  • At the end of the data transfer the data output is set to logically "0" for approx. 20µs. If within these 20µs a further clock brush reaches the encoder interface, the already transferred data is readout once again. This multiple transfer of the same data makes it possible to recognize transfer errors.
  • After the 20µs the data output goes to its rest position, logically "1". Subsequently new encoder data can be readout